Intel’s Foveros 3D Chip Stacking Redesigns Chip Making Process


Only when designers and engineers thought that cramming transistors with each other is next to impossible, and the decade would possibly see the end of Moore’s Law, Intel has shown the light at the end of the tunnel.

At Intel’s “Architecture Day,” the company unveiled a 3D packaging technology, called “Foveros,” that will allow it to stack logic chips – like GPU and processors atop of one another.

“It will allow products to be broken up into smaller “chiplets,” where I/O, SRAM and power delivery circuits can be fabricated in a base die, and high-performance logic chiplets are stacked on top,” reports Intel.

Intel 2D and 3D Foveros

Intel marks the announcement as a strategic shift for the company’s design and engineering model. As for the Foveros 3D chipsets, the company claims that we would see the new range of Intel products in the second half of 2019.

Foveros products will combine 10nm compute-stacked chiplets with a low-power 22FFL base die. This might be the perfect and only solution to solve the issue of manufacturing 10nm processors, given it had a lot of trouble making it earlier.

Going by the facts, Intel might deliver 10nm CPU stacked with various 14nm and 22nm chiplets modules in future.

Apart from this, a new microarchitecture termed “Sunny Cove” was also introduced at the Architecture day. Other than increasing performance and power efficiency, it will include features to accelerate special purpose computing tasks like AI and cryptography.

Also Read: Intel Announces New 10nm Sunny Cove CPU Architecture
Charanjeet Singh

Charanjeet Singh

Charanjeet owns an iPhone but his love for Android customization lives on. If you ever ask him to choose between an iPhone, Pixel or Xiaomi; better if you don't.
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