Graphene Wrapped Wires can Boost Chip Speed by Thirty Percent



Advancements in technology has made faster computing a demand. Researchers have shown interest in the very basic elements of chip design to improve computing speeds. And have been able to introduce graphene in yet another revolutionary way of use.

The computer chip consists of large number of transistors connected through copper wires which are insulated with protective sheath. This covering sheath is made up of tantalum nitride. Tantalum nitride (TaN) is used as dielectric insulator film during manufacturing of integrated circuits. The copper wires in a chip are extremely small in size and thin.


Experiments performed by Stanford researchers demonstrate that graphene can be used as an effective and better sheathing material in chip fabrication. Graphene is an allotrope of carbon in the form of one atom thick plane sheets. Graphene forms structural units of carbon nanotubes.

Copper wires are the medium through which processed data from transistors is transported. The protective layer around copper wires performs two major functions- isolating copper from the silicon part of chip and allowing movement of electrons.

Graphene sheathing will allow electrons to move through copper wires more quickly. This would further make possible faster exchange of data through transistors. Graphene’s single-atom, thinner and stronger layer around copper wires can be advantageous in a long run of reducing chip sizes.

According to Stanford experiments, graphene effectively does the same work as eight times thicker tantalum nitride layer currently being used. The demand of present technology is minimized electronic components. Much thinner layers of graphene can allow chips to shrink further in size along with speeding up functioning.

In the integrated circuits currently used, graphene sheathing would boost up the chip speed by 4 to 17 percent depending upon dimensions of the wires. With the advancements in technologies and shrinking transistors, it is estimated that graphene wrapping would help increasing chip speeds by 30 percent in coming two generations.

H S Philip Wong, electrical engineer at Stanford with a team of six researchers, including two from the University of Wisconsin-Madison, will present the work on graphene wrapped wires at the Symposia of VLSI Technology and Circuits in Kyoto. “Graphene has been promised to benefit the electronics industry for a long time, and using it as a copper barrier is perhaps the first realization of this promise,” Wong said.
Graphene has been continuously proved useful in many potential ways. This research is another addition to exceptional applications of this material.
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Kriti Kushwaha

Kriti Kushwaha

Kriti is an aspiring blogger and Electronics and Communication Engineering student from NIT-H who loves poetry and McD's burger, of course.
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